The VAX-11/780, code-named "Star", was introduced on 25 October 1977 at DEC's Annual Meeting of Shareholders. It is the first computer to implement the VAX architecture. The VAX-11/780 central processing unit is built from transistor-transistor logic devices and has a 200 ns cycle time and a 2 kB cache. Memory and I/O are accessed via the Synchronous Backplane Interconnect. The VAX-11/780 supports 128 kB to 8 MB of memory through one or two memory controllers. Each memory controller supports 128 kB to 4 MB of memory. The memory is constructed from 4 or 16 kbit metal oxide semiconductor RAM chips mounted on memory array cards. Each memory controller controls up to 16 array cards. The memory is protected by error correcting code. The VAX-11/780 uses the Unibus and Massbus for I/O. Unibus is used for attaching lower-speed peripherals such as terminals and printers and Massbus for higher-speed disk and tape drives. Both buses are provided by adapters that interface the bus to the SBI. All systems come with one Unibus as standard, with up to four supported. Massbus is optional, with up to four supported. The VAX-11/780 also supports Computer Interconnect, a proprietary network to attach disk drives and potentially share them with other VAX computers. Later, this feature was used to connect VAX computers in a VMScluster.
VAX-11/782
The VAX 11/782, code-named "Atlas", is a dual-processor VAX-11/780 introduced in 1982. Both processors share the same MA780 multiport memory bus and the system operates asymmetrically, with the primary CPU performing all I/O operations and process scheduling with the second, attached processor only used for additional computationally-intensive work. For multistream computation-intensive tasks the system delivers up to 1.8 times the performance of a VAX 11/780.
VAX-11/785
The VAX-11/785, code-named "superstar", was introduced in April 1984. It is essentially a faster VAX-11/780, with a CPU cycle time of 133 ns versus the 200 ns CPU cycle time of the VAX-11/780. The memory subsystem was also upgraded to support higher capacity memory boards.
VAX-11/787
The VAX-11/787 is a dual-processor variant of the VAX-11/785.
VAX-11/750
The VAX-11/750, code-named "Comet", is a more compact, lower-performance TTL gate array–based implementation of the VAX architecture introduced in October 1980. The CPU has a 320 ns cycle time.
VAX-11/751
A ruggedized rack-mount VAX-11/750.
VAX-11/730
Introduced in April 1982, the VAX-11/730, code-named "Nebula", is a still-more-compact, still-lower-performance bit slice implementation of the VAX architecture using AM2901 chips for the CPU. Its CPU has a 270 ns cycle time.
VAX-11/725
Code-named "LCN", it is a cost-reduced model of the VAX-11/730. Its CPU has a 270 ns cycle time.
VAX-11/788
The VAX-11/788 is code-named "VISQ".
Remaining machines
The Living Computer Museum of Seattle, Washington maintains a VAX-11/780-5 running OpenVMS 7.3. to try out this equipment and software. The Computer History Museum of Mountain View, California has three VAX-11/780 systems, one VAX-11/725, one VAX-11/730, and one VAX-11/750 within its permanent collection. The RECHENWERK RECHENWERK Computer- & Technikmuseum Halle in Halle, Germany holds a VAX-11/730 and a very rare east German clone of a VAX-11/780 named Robotron K 1840 in its permanent exhibition. The retrocomputing association has a VAX11/780 to which they dedicated a calendar.
