Compute Express Link


Compute Express Link is an open standard interconnect for high-speed CPU-to-device and CPU-to-memory, designed to accelerate next-generation data center performance. CXL is built upon the PCI Express physical and electrical interface with protocols in three key areas: I/O, memory and cache coherence.
On April 2, 2020, the Compute Express Link and Gen-Z Consortiums have announced their execution of a Memorandum of Understanding, describing a mutual plan for collaboration between the two organizations.

History

CXL Specification 1.0

On March 11, 2019, the CXL Specification 1.0 based upon PCIe 5.0 was released. The founding promoter members of the CXL specification included: Alibaba, Cisco, Dell EMC, Facebook, Google, HPE, Huawei, Intel and Microsoft.

CXL Specification 1.1

In June, 2019, the CXL Specification 1.1 was released.
On July 18, 2019, AMD joined CXL.

Consortium members

Founding members as of September 21, 2019, are:
Current members as of September 21, 2019, are:

Implementations

On April 2, 2019 Intel announced their family of Agilex FPGAs featuring CXL.

Also see